In an era where many personal computers used multiple 8 Kb static RAM boards, which consumed
slots in the chassis, lots of power, and emitted abundant heat, the Marinchip M9900 64K
was revolutionary, although initially greeted with scepticism by customers. There are
two kinds of random access memory (RAM): static and dynamic. A static RAM chip simply stores
the data permanently, using multiple transistors per bit (usually four at the time), but requires
power regardless of whether the memory is being accessed or not. A dynamic RAM chip needs only
one transistor per cell, and hence can store four times the amount of data on the same size
silicon chip, but it requires “refresh”. If you don't periodically read the data
and write it back, it will “forget” the data and it will be corrupted.
Used properly, and observing the manufacturer's refresh requirements, dynamic RAM chips are
perfectly reliable and consume far less power than static RAMs while providing four times the storage
density. But, given the general flakiness of the S-100 bus and the peripherals people connected
to it, dynamic RAM cards received a well-deserved reputation for unreliability. Everything
would be just tickety-boo, and then your “sloppy disc” controller would lock up the
bus, refresh would fail, and HAL could only remember the first song he was taught.
The M9900 CPU provided a unique opportunity to exploit the newly-announced 4116 16 K dynamic
RAM chips. Just 32 of these chips, fitting easily on an S-100 bus card, would fill the
entire 64 Kb address space provided by that bus. Using the M9900 CPU's 16-bit addressing
mode, it would run twice as fast as conventional S-100 memory, and by performing all refresh
operations on the memory card, completely autonomously to whatever was going on in the
computer, rock-solid refresh would be guaranteed (and, just to be sure, I refreshed about
ten times as frequently as required, which actually only negligibly increased the power
requirements).
This board was originally prototyped on a wire-wrap card, then refined by Fred Camerer,
who made the digital design far more elegant and laid out the printed circuit board by
hand with red and blue tape. The dynamic RAM chips are tilted because that allows the
bus lines which connect them to run straight rather than zig and zag up and down from chip
to chip. You'd never do that today, because it would prevent machine-stuffing of the
boards, but that wasn't a consideration in the late 1970s.
A single M9900 64K board filled up the entire address space of the M9900 CPU, but not
our ambitions. The DIP switch at the bottom allowed you to assign a memory board a
“Bank ID”, and the switches at the right allowed disabling parts of the address
space to which the board responded. By setting the switches appropriately, you could install
as many of these boards in your machine as you had slots available, and configure them so
that our NOS/MT operating system could switch among them, providing each user his or her
own 64 Kb (less operating system overhead, which was shared), completely isolated from
the address space of other users. This wasn't elegant by today's standards of virtual
memory and vast flat address spaces, but it got you there, and users were able to
configure multi-user systems which shared a large hard disc and met the needs of their
businesses.
M9900 64K RAM Theory of Operation and Configuration Guide